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TMC2069P7C
Demonstration Board for the TMC3003 DAC
Features
* Parallel TTL Compatible Inputs * Component and VGA Outputs * Fairchild demo board compatibility
Description
The TMC2069P7C DAC demonstration board provides a flexible base for evaluating the performance of the TMC3003 triple 10 bit DAC. The board can output analog component video or VGA. There are high quality Hybrid filters (601-003) on the output.
Applications
* * * * Evaluation of TMC3003 DAC Output for TMC2068P7C Decoder demo board Output for Genesis 10-bit Line doubler board System Breadboarding
Preliminary Information
Block Diagram
Analog RGB VGA Output
+5V 0V -5V 96 Way Edge Connector (female) Digital Inputs: 10 bit G/Y 10 bit B/U 10 bit R/V DAC Clock SYNC BLANK TMC3003 1
High Quality LPF High Quality LPF High Quality LPF
Analog RGB/YPbPr Video Output
32
Analog Outputs for the TMC22153 Digital Decoder
Rev. 0.9.1
PRELIMINARY INFORMATION describes products that are not in full production at the time of printing. Specifications are based on design goals and limited characterization. They may change without notice. Contact Fairchild Semiconductor for current information.
TMC2069P7C
PRODUCT SPECIFICATION
Functional Description
The TMC2069P7C is designed to demonstrate the performance of the TMC3003 Digital to Analog converter. It also offers an example of design practices that result in highquality video performance. The TMC3003 is a high-speed triple 10-bit D/A converter especially suited for video and graphics applications. It offers 10-bit resolution, TTL-compatible inputs, low power consumption, and requires only a single +5 Volt power supply. It has single ended current output, SYNC and BLANK control inputs, and a separate current source for adding sync pulses to the Green D/A converter output. It is ideal for generating analog RGB from digital RGB and driving computer display and video monitors. Three speed grades are available: 30, 50, and 80 Msps. The DAC module can be plugged into the TMC2068P7C decoder demonstration board to provide analog RGB or YPbPr outputs for viewing the decoder performance. The board can also be plugged into the 10-bit DICE line doubler demonstration board from Genesis. The input for the Genesis 10 bit line doubler board is being provided by the TMC2067P7C 10 bit ADC demonstration board connected to the TMC2068P7C decoder demonstration board. A set of switches routes the triple DAC outputs to either the VGA connector or the component video connectors. The SYNC and BLANK signals to the triple DAC are required for the VGA mode are disabled when the component video output is required. The component video connectors provide sync on green.
Setup Procedure
1. To set up the output levels on the triple dac, place a digital NTSC unmodulated ramp that has peak white at the digital level 824 and blanking at 240. The output analog levels should be 286 mV sync tip to blank level and 1.0V sync tip to peak white. If the output levels are incorrect, adjust the GREEN output using the potentiometer RV1. Apply either the unmodulated digital ramp used in step 1 to the red and blue inputs to adjust the Pb/BLUE and Pr/RED outputs or apply SMPTE color bars and measure the Pb and Pr outputs. Adjust RV2, to adjust the RED, and RV3, to adjust the BLUE output. a. b. If using the unmodulated ramp, match the output voltage levels to the values on the green channel. If using the SMPTE color bars, the level of Pb and Pr peak to peak should be 525 mV.
2.
3.
Preliminary Information
4.
1.0V 286 mV
Figure 2. Unmodulated Ramp Waveform
Pass Band
0 dB 0 dB
Stop Band
With 13.5 MHz SinX/X Roll-off 0.25 dB/Div
With 13.5MHz SinX/X Roll-off
-2.0 dB
0 MHz
6 MHz
-50 dB
0 MHz
10 MHz
100 MHz
2T Pulse
475 nSec
Group Delay
20 nSec/Div
HAD=200 nSec
375 nSec 0 MHz 6 MHz
Figure 1. Output Low Pass Filters
2
PRODUCT SPECIFICATION
TMC2069P7C
Power Supply Requirements
The TMC2069P7C board requires 1.5 Amps from the +5 Volt power supply and 0.5 Amps from the -5 Volt power supply. The -5 Volt power supply powers the SMA filters. The +5 Volt power supply not only drives TTL logic devices but it also provides the power and voltage references to the TMC3003. Therefore, it is recommended that a bench power supply be used with the cable lengths kept to a minimum.
The response at 5.0MHz typically varies<0.25dB with supplies of 5V to 8V. When operating in the 0dB gain mode, pin 6 must be well isolated from ground planes. When operating in the +6dB gain mode, pin 6 must have a low resistance path to ground. For more information please contact Microelectronic Module Corporation (MMC) at 414-785-6506.
Output Low-Pass Filters
The 601-003 filters are high end broadcast quality filters. They are Virtual 601 post filters with a bandwidth of 5.75MHz. 5-pole, sharp cutoff, Elliptic response, with 3 sections of group delay equalization. These filters were designed for SinX/X compensated CCIR 601 luminance applications and make an excellent post-filter following a D/A converter.
Preliminary Information
3
Preliminary Information
TMC2069P7C
4
Schematics
IPCONN TMC3003 OUTPUT FILTERS R[0:9] G[0:9] B[0:9] B[0:9] B[0:9] G[0:9] G[0:9] IOR IOG IOB IOR IOG IOB R[0:9] R[0..9]
PXCK VSYNC HSYNC BLANK -HS -VS 3003
PXCK_ VSYNC_ HSYNC BLANK
-HS -VS
IPCONN
FILTERS
POWER
POWER
PRODUCT SPECIFICATION
Figure 3. TMC2069P7C (10 Bit Triple DAC)
VCC
E3 SELECT R3 4.7K VCC U2B 3 2 5 74ACT00 74ACT00 2 -HS -VS U2C 9 8 10 U3B VCC 74ACT00 5 C14 0.1 4 C15 0.1 C16 10 C17 0.1 74ACT125 6 VDD 1 R22 22 -HS -VS 3 R21 22 74ACT125 U3A 6 C13 0.1 4 U2A 1
VSYNC
PRODUCT SPECIFICATION
HSYNC
Schematics (continued)
BLANK
U4 R[0:9] 17 16 SYNC BLANK
R[0..9]
R 36 G 35 B 32
IOR IOG IOB
G[0:9]
G[0..9]
R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 40 41 42 43 44 1 2 3 4 5 R0 R1 R2 R3 R4 R5 R6 R7 R8 R9
VDD C25 COMP 37 0.1 R6 3.3K RREF VREF 39 38 D5 LT1004-1.2 C29 0.1 2 3 2 RV1 5K TP4 TP
B[0:9]
B[0..9]
G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 6 7 8 9 10 11 12 13 14 15 G0 G1 G2 G3 G4 G5 G6 G7 G8 G9
WHEN USING OVER-021 FILTERS, R7 AND R8 SHOULD BE 750 OHMS
B0 B1 B2 B3 B4 B5 B6 B7 B8 B9
19 20 21 22 23 24 25 26 27 28 29
B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 CLK TMC3003
R7 412
R8 412
PXCK
C29 IS NOT USED IF D5 IS INSTALLED
1
Figure 4. TMC3003, Passive Filters
TMC2069P7C
Preliminary Information
5
Preliminary Information
TP2 HS J2 -VS -HS
6
TP3 VS VCC L10 BEAD C35 0.1 7 V+ IOR IN 75 1% V- X2 VGA JP2 SELECT JUMPER RED R13 75 VGA E5 SELECT 1 J3 BNC RED L11 RV2 2 500 VEE C36 0.1 BEAD 96 E4 OUT CON15 R11 39 1% 3 75 1% R12 1 12 R10 R U5 601-003 TP6 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1 GREEN C37 0.1 SELECT 7 IOG IN R15 31.6 1% L13 BEAD C38 0.1 R17 75 2 96 JP3 JUMPER 1 VEE V- X2 75 1% J4 BNC GREEN OUT 1 12 V+ R14 G BLUE U6 601-003 TP7 VGA E6 BEAD VCC L12 2 VCC L14 BEAD C39 0.1 7 V+ IOB IN R19 39 1% 3 2 500 VEE RV3 BEAD C40 0.1 R20 75 1 L15 75 1% R16 V- X2 96 1 OUT U7 601-003 12 R18 75 1% 1 JP4 JUMPER 2 TP8 B J5 BNC BLUE
TMC2069P7C
Schematics (continued)
PRODUCT SPECIFICATION
Figure 5. TMC2069P7C
CONNECTOR "P1" IS A FEMALE CONNECTOR WHICH MATES WITH THE MALE CONNECTOR WITH THE PIN NUMBERS BEING FLIPPED. EXAMPLE: P1A PIN 1 MATES WITH THE MALE CONNECTOR PIN 32.
PRODUCT SPECIFICATION
R[0:9] G[0:9] B[0:9]
R[0:9] G[0:9] B[0:9] PXCK VSYNC HSYNC BLANK
Schematics (continued)
VCC
P1A P1C P2A
P1B
P2B
P2C
PXCK PCK CREF VSYNC HSYNC HREF VREF ODDIN VCC NTSC/PAL CLAMP RGB R1 4.7K
PXCK PCK ANLGCMP ANLGCHR XEN CREF VSYNC HSYNC HREF VREF ODDIN XDIR XHSYNC XVSYNC XPXCK XRS3 XRS2 XRS1 XRS0 -5V -5V -5V NTSC/PAL CLAMP RGB
ANLGCMP ANLGCHR XEN XDIR XHSYNC XVSYNC XPXCK XRS3 XRS2 XRS1 XRS0 -5V -5V -5V LOCK D1 RESET SCL R23 4.7K SDA OE BLANK JP5 +12V R2 4.7K JP1 DICE OE PGM_IN -12V -12V IE VCC VCC
PGM_IN -12V -12V IE
LOCK D1 RESET SCL SDA OE BLANK RGB
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 +12V 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 EURO96F
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 HEADER 96 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 B0 B1 B2 B3 B4 B5 B6 B7 B8 B9
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
+12V
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 HEADER 96 VEE
+12V
96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 HEADER 96
EURO96F
EURO96F
Figure 6. IPCONN
TMC2069P7C
Preliminary Information
7
Preliminary Information
TMC2069P7C
Schematics (continued)
8
VCC L1 BEAD D1 C3 0.1 DIODE LED C4 0.01 + C2 0.47 F D2 VDD + C5 0.47 F C7 0.1 C8 0.01 L2 BEAD VEE D3 DIODE D4 LED G1 LOOP G2 LOOP G3 LOOP
+
J1
C1 22 F
1 2 3
PWR3
+ C6 22 F
Figure 7. Power
PRODUCT SPECIFICATION
PRODUCT SPECIFICATION
TMC2069P7C
Table 1. TMC2069P7C Parts List
Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Qty. 2 2 1 14 2 2 1 1 1 4 3 5 1 1 3 8 1 1 1 2 4 1 1 1 5 2 3 1 2 6 1 1 1 3 2 AMP: 103747-2 BEAU: 870503 BEAU: 871803 AMP: 748390-5 Amphenol: 31-5431 Fair-Rite: 2743019447 AMP: 650461-4 AMP: 3-103817-0 Bourns: 3262W502 Bourns: 3262W501 MiniReel: 615-848 MiniReel: 615-844 MiniReel: 615-347 MiniReel: 615-375 MiniReel: 615-275 MiniReel: 615-809 MiniReel: 655-275 MiniReel: 615-231 MiniReel: 615-804 Mouser: ME151-203-100 Motorola: 74ACT00 Motorola: 74ACT125 Fairchild: TMC3003 601-003 CCI: B500-2-0.5-FO Part Name MiniReel: 645-823 MiniReel: 641-647 MiniReel: 644-810 MiniReel: 605-611 MiniReel: 605-510 MiniReel: 76-4004 HP: hlmp-1600 HP: hlmp-1620 Linear Technology LT1004CH-1.235 SECMA: 090320102 Reference Designator C1,C6 C2,C5 C16 C3,C7,C13,C14,C15,C17,C25,C29, C35,C36,C37,C38,C39,C40 C4,C8 D1,D3 D2 D4 D5 E3,E4,E5,E6 G1,G2,G3 JP1,JP2,JP3,JP4,JP5 J1 J2 J3,J4,J5 L1,L2,L10,L11,L12,L13,L14,L15 P1 P2 RV1 RV2,RV3 R1,R2,R3,R23 R6 R7 R8 R10,R12,R14,R16,R18 R11,R19 R13,R17,R20 R15 R21,R22 TP2,TP3,TP4,TP6TP7,TP8 U2 U3 U4 U5,U6,U7 Shield Description 22uf 25v Tantalum 0.47 uf 25v Tantalum 10 uf 25v Tantalum 0.1uF 0.01 uf FM4004, Diode LED, Red 5v LED, Yellow 5v LT1004, 1.2 Subminiature switch, 2 pos. sip Wire Loop, gnd Jumper, header Terminal block plug, and socket Con15, VGA BNC, Connector Ferrite Bead EURO96F, Connector Header-96, 3x32 5k ohm, pot. 500 ohm, pot. 4.7k ohm 3.3k ohm 475 ohm 750 ohm 75 ohm 1% 39 ohm 1% 75 ohm 31.6 ohm 1% 22 ohm Test Points surface mount IC surface mount IC surface mount IC Active filters Board stiffener used as a shield Special order part
Preliminary Information
9
TMC2069P7C
PRODUCT SPECIFICATION
INPUT 96 Way Connector (Female)
Row A 32 31 30 29 28 27 26 25 24 +5V D1 or R/V [bit 0] D1 or R/V [bit 1] D1 or R/V [bit 2] D1 or R/V [bit 3] D1 or R/V [bit 4] D1 or R/V [bit 5] D1 or R/V [bit 6] D1 or R/V [bit 7] D1 or R/V [bit 8] D1 or R/V [bit 9] Comp, G/Y, or Luma [bit 0] Comp, G/Y, or Luma [bit 1] Comp, G/Y, or Luma [bit 2] Comp, G/Y, or Luma [bit 3] Comp, G/Y, or Luma [bit 4] Comp, G/Y, or Luma [bit 5] Comp, G/Y, or Luma [bit 6] Comp, G/Y, or Luma [bit 7] Comp, G/Y, or Luma [bit 8] Comp, G/Y, or Luma [bit 9] Chroma or B/U [bit 0] Chroma or B/U [bit 1] Chroma or B/U [bit 2] Chroma or B/U [bit 3] Chroma or B/U [bit 4] Chroma or B/U [bit 5] Chroma or B/U [bit 6] Chroma or B/U [bit 7] Chroma or B/U [bit 8] Chroma or B/U [bit 9] GND 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 +12V GND GND +5V +5V +5V GND Analog Composite/luma GND Analog chroma XEN GND XDIR XHSYNC XVSYNC XPXCK XRS [bit 3] XRS [bit 2] XRS [bit 1] XRS [bit 0] GND -5V -5V -5V GND PGM_IN -12V -12V IE (input enable) GND Row B 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 +12V GND LOCK D1 RESET SCL GND SDA OE (output enable) BLANK (DAC) +5v GND PXCK GND PCK GND CREF GND VSYNC HSYNC HREF VREF ODD IN GND NTSC/PAL CLAMP pulse RGB Row C
Preliminary Information
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
10
TMC2069P7C
PRODUCT SPECIFICATION
Input Edge Connector Design Notes
Signal Flow FORWARD
11 Y/Composite LPF and Clamp Circuit TMC1185 TMC2242 EPROM FPGA Digital LPFs TMC2242 Decoder Input Logic 32 32 TMC22153 TMC2072
11
High Quality LPF High Quality LPF High Quality LPF
10 bit ADCs Chrominance BPF and Clamp Circuit TMC1185
TMC3003
2:1 Mux Low Quality LPF Low Quality LPF Low Quality LPF
SW1
SW2
D.C. Supply
SW1
32 32
+5V to -5V
Preliminary Information
Signal Flow BACKWARD
Figure 8.
Important:
Boards with different revision letters may not be compatible. Damage may occur if they are connected together! * XPXCK is a two times pixel clock fed BACKWARD. * XHSYNC and XVSYNC are timing reference signals fed BACKWARD. * The MASTER/SLAVE signal states if a board is a MASTER or a SLAVE board. This signal is fed FORWARD. A MASTER board produces the PXCK, HSYNC, and VSYNC signals, and a SLAVE board expects to receive XPXCK, XHSYNC, XVSYNC, etc . * XDIR is fed FORWARD and controls in which direction the XRS[3:0] data flows. * PGM_IN is a negative going pulse, logically ANDed with the onboard program start pulse, for initiating the programming sequence for components on that board. Care must be taken to ensure that multiple devices do not try to drive the RBUS at any given time. Minimum width of PGM_IN is 1uS.
* The RESET pin on the input edge connector should be connected directly to the RESET pin on the output connector. A link should be used to connect any pulse to the RESET line. * The MASTER/SLAVE, XDIR, PGM_IN and RESET pins on the input edge connector should be connected to +5V through a 10k pull up resistor. * The CLAMP signal is fed BACKWARD from a MASTER to a SLAVE board. The CLAMP signal should not be fed FORWARD.
Related Products
* * * * TMC2068P7C Decoder demonstration board TMC2067P7C ADC demonstration board Raydemo software TMC2070P7C R-bus interface board
11
TMC2069P7C
PRODUCT SPECIFICATION
Ordering Information
Product Number TMC2069P7C TMC2069P7CG1
Notes: 1. Setup for use with Genesis 10-bit line doubler and comes with OVER-21 filters instead of 601-003 filters. For information call MMC at 414-785-6516. sales@mmccorp.com
Temperature Range 25C 25C
Speed Grade 80 MHz 80 MHz
Screening Commercial Commercial
Package 4" by 5" Printed Circuit Board 4" by 5" Printed Circuit Board
Package Marking TMC2069P7C TMC2069P7CG
A schematic database is available in OrCADa format. Contact the factory. The TMC2069P7C Demonstration Board, design documentation, and software are provided as a design example for the customers of Fairchild. Fairchild makes no warranties, express, statutory, or implied regarding merchantability or fitness for a particular purpose.
Preliminary Information
FCC Compliance
This device has not been approved by the Federal Communications Commission (FCC). This board is intended for the evaluation of Fairchild products only. This device is not and may not be offered for sale or lease or sold or leased until the approval of the FCC has been obtained.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
www.fairchildsemi.com 5/20/98 0.0m 001 Stock# DS7002069P O 1998 Fairchild Semiconductor Corporation
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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